May 12, 2026 Melissa Kashouh

d-Matrix – System Power Engineer, Principal

  • Anywhere

● TALENT ONE MARKET INTELLIGENCE: D-MATRIX

🔥 TALENT LIQUIDITY:
Extremely tight. The intersection of high-current power electronics and advanced packaging (MCM) is a niche with fewer than 500 qualified practitioners globally.

📈 ALPHA SIGNAL:
Power architecture is the new ‘bottleneck’ moat. By securing this role, you are positioning yourself at the center of the AI hardware stack, ensuring your compensation is tied to the most critical failure point in the industry—guaranteeing your mortgage is paid by the companies that own the compute.

EST. COMPENSATION
$240k – $310k Base + Significant Equity Package
SECTOR HEAT
88.0/100
CANDIDATE PROTOCOL: Focus your narrative on ‘Power Integrity’ (PI) and ‘Signal Integrity’ (SI) co-design. Mentioning specific experience with high-current transient response in multi-chip modules will bypass the initial screening.

Official Role Description: d-Matrix

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration.We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution.  Ready to come find your playground? Together, we can help shape the endless possibilities of AI. System Power Engineer, PrincipalLocation: Santa Clara, CA (Hybrid)Team: Hardware Engineering / Power ArchitectureAbout the RoleAs the Principal System Power Engineer, you will be the lead architect for the energy backbone of our AI accelerators. This role is unique in its breadth, spanning from the MCM (Multi-Chip Module)/Chiplet-level power distribution through the PCBA and into the system-level power shelf.You will solve the formidable challenge of delivering thousands of amps to high-performance silicon while maintaining razor-sharp power integrity. You aren’t just managing power; you are engineering the efficiency and stability that makes large-scale AI inference possible.Key ResponsibilitiesPower Architecture & Design: Architect end-to-end power delivery solutions for high-TDP AI accelerators, focusing on multi-phase VRMs (Voltage Regulator Modules) and Point-of-Load (PoL) converters.MCM & Chiplet Power Delivery: Lead the definition of power delivery for chiplet-based architectures, including substrate PDN, micro-bump current density analysis, and transient response optimization at the die-to-die interface.Power Integrity (PI) Leadership: Drive the PI strategy across the board and package. This includes performing/overseeing DC drop analysis, AC impedance profiling (Z_target), and decoupling capacitor optimization to mitigate high-frequency noise.Cross-Functional Validation: Partner with the Hardware Qualification and SI/PI teams to define validation suites. You will lead the correlation between simulation results and lab measurements using specialized tools like power emulators and high-bandwidth probes.ODM & Partner Management: Drive technical requirements and design reviews with ODM partners, ensuring that outsourced PCBA designs meet d-Matrix’s stringent power efficiency and noise floor standards.Thermal & Mechanical Synergy: Collaborate with thermal engineers to optimize the layout for heat dissipation while maintaining low-impedance power paths.Required QualificationsEducation: BS/MS/PhD in Electrical Engineering or a related technical field.Experience: 12+ years of experience in power electronics and system-level power delivery for HPC, GPUs, or Data Center hardware.Technical Mastery:Expert knowledge of DC-DC converter topologies (Buck, Multiphase, TLVR).Deep understanding of PDN modeling and simulation (e.g., Ansys SIwave, Cadence Sigrity/CST).Experience with high-current transients (di/dt) associated with 5nm/3nm process nodes.Hands-on Validation: Proficiency with high-speed scopes, electronic loads, and FRA (Frequency Response Analyzers) for Bode plot and impedance measurements.MCM Experience: Proven track record of designing power for complex packages or multi-die modules.Preferred SkillsFamiliarity with Vertical Power Delivery (VPD) or back-side power delivery technologies.Experience with 48V-to-12V intermediate bus conversion and Open Compute Project (OCP) power specifications.Understanding of PMBus/I2C/SVI3 protocols for telemetry and power management.Why Join d-Matrix?We are pushing the limits of “Power-per-Watt” in the AI space. In this role, you will have the autonomy to choose the best-in-class components and architectures to ensure our Digital In-Memory Computing technology runs at peak performance with maximum reliability.Equal Opportunity Employment Policyd-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.

Melissa Kashouh

Founder of Talent One I help enterprise leaders and investors forecast hiring surges, talent shortages, and market friction up to six weeks in advance using our patent-pending predictive intelligence platform. As the founder of Talent One AI (the intelligence layer of The Talent One), I built a system that turns lagging recruiting data into actionable foresight — helping companies reduce technical debt, protect employer brand, and hire ahead of the curve. Based in Providence, Rhode Island.
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